Job Role : LEAD DESIGN ENGINEER

• RTL coding for emulation Model and RTL code review.
• Development of different memory models with different architectures to support different Business units.
• Working on Design for Testability features for the latest System On Chip (SoC) designs.
• Design and implement state-of-the-art DFT architecture to meet growing industry demands for efficient test and debug capabilities.
• Generate and Insert DFT structures at the RTL and gate level and verify the correct operation of those structures from RTL to back annotated gates.
• Produce ATE test patterns for MBIST, Functional & analog testing and support silicon ATE testing and debugging.
• Participate in diagnostics and failure analysis for customer returns.
• Run timing analysis, review constraints and waivers, analyze violations and work with other teams to fix the design.
• Mentor and lead a team of junior engineers to accomplish all the above tasks within the defined project constraints.
• Analyze user requirements, and design and develop system architecture and specifications
• Develop and conduct design verification simulations and develop testbenches for verification.
• Supervise, inspect and provide design support during the manufacturing of integrated circuits.
• Design of electronic circuits, components, systems and equipment.
• Investigate electronic failures.
• Debugging ATPG pattern and simulations .

 Experience : 5 plus years